This invention relates to integrated circuits, and more particularly, to integrated circuits and image and video compression methods.
Recently, Digital Still Cameras (DSCs) have become a very popular consumer appliance appealing to a wide variety of users ranging from photo hobbyists, web developers, real estate agents, insurance adjusters, photo-journalists to everyday photography enthusiasts. Recent advances in large resolution CCD arrays coupled with the availability of low-power digital signal processors (DSPs) has led to the development of DSCs that come quite close to the resolution and quality offered by traditional film cameras. These DSCs offer several additional advantages compared to traditional film cameras in terms of data storage, manipulation, and transmission. The digital representation of captured imges enables the user to easily incorporate the images into any type of electronic media and transmit them over any type of network. The ability to instantly view and selectively store captured images provides the flexibility to minimize film waste and instantly determine if the image needs to be captured again. With its digital representation the image can be corrected, altered, or modified after its capture. See for example, Venkataraman et al, “Next Generation Digital Camera Integration and Software Development Issues” in Digital Solid State Cameras: Design and Applications, 3302 Proc. SPIE (1998). Similarly, U.S. Pat. No. 5,528,293 and U.S. Pat. No. 5,412,425 disclose aspects of digital still camera systems including storage of images on memory cards and power conservation for battery-powered cameras.
Further, DSCs can be extended to capture video clips (short video sequences) and to compress images/video with methods such as JPEG for (sequences of) still images and MPEG for video sequences. In DCT-based video compression such as H.261, H.263, MPEG1, MPEG2, and MPEG4, or image compression such as JPEG, a picture is decomposed into macroblocks. Each macroblock contains a certain number of 8×8 blocks, depending upon the chroma-format used. For example, in the case of 4:2:0 chroma-format a macroblock is made up of four 8×8 luminance blocks and two 8×8 chrominance blocks. FIG. 3 depicts in block diagram a DCT-based video or image sequence encoding camera system. In order to reduce the bit-rate, 8×8 DCT (discrete cosine transform) is used to convert the blocks into the frequency domain for quantization. The first coefficient in an 8×8 DCT block is called the DC coefficient; the remaining 63 DCT-coefficients in the block are called AC coefficients. The DCT-coefficient blocks are quantized, scanned into a 1-D sequence, and coded by using variable length coding (VLC). For predictive coding in which motion compensation (MC) is involved, inverse-quantization and IDCT are needed for the feedback loop.
In some cases, however, processors may have limited processing power, which could make real-time video or still-image sequence encoding impossible. Similarly, other digital cameras, such as cameras in a network, may have limited processing power which impairs video encoding.